材料科学
沟槽
MOSFET
JFET公司
光电子学
碳化硅
肖特基二极管
电容
二极管
肖特基势垒
击穿电压
电气工程
电压
场效应晶体管
纳米技术
晶体管
工程类
化学
复合材料
物理化学
图层(电子)
电极
作者
Jingwei Guo,Ping Li,Jie Jiang,Wei Zeng,Ruoyu Wang,Hao Wu,Ping Gan,Zhi Lin,Shengdong Hu,Fang Tang
标识
DOI:10.1109/ted.2022.3225121
摘要
In this article, a recessed source trench silicon carbide (SiC) MOSFET with integrated MOS-channel diode (MCD) is proposed and investigated by TCAD simulations. The MCD features a short channel, and the channel length could be adjusted by varying the recessed depth. Owing to the drain-induced barrier lowering effect, a low potential barrier for electrons to flow through the JFET region to the N+ source region is formed, which successfully eliminates the bipolar degradation of the parasitic body p-i-n diode. Besides, the recessed source trench introduces an additional depletion region and homogenizes the distribution of the OFF-state electric field. As a result, a low gate-to-drain capacitance and a high breakdown voltage (BV) are obtained. Simulation results indicate that compared with the SiC trench MOSFET with integrated self-assembled three-level protection Schottky barrier diode, a 78.7% reduction in gate-to-drain capacitance and a 24.4% improvement in BV could be achieved in the proposed SiC MOSFET.
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