现场可编程门阵列
计算机科学
加速
可靠性(半导体)
过程(计算)
实时计算
计算机硬件
结构光
硬件体系结构
功率(物理)
人工智能
软件
并行计算
量子力学
操作系统
物理
程序设计语言
作者
Jianer Wang,Lei Jin,Junheng Li,Ke Xu
出处
期刊:Measurement
[Elsevier]
日期:2024-03-26
卷期号:231: 114580-114580
标识
DOI:10.1016/j.measurement.2024.114580
摘要
Due to its real-time efficiency, stability, and reliability, structured light 3D measurement is widely used in measuring surface quality and manufacturing accuracy of industrial products. With the structured light measurement system's slow acquisition speed and low efficiency, it is difficult to meet the needs of online real-time detection, resulting in sparse 3D contour data and loss of details. To improve the algorithm's running speed and balance hardware resource consumption, a structured light extraction algorithm adapted to hardware acceleration is proposed, which executes the three low-coupling computational modules at eight-pixel parallel speed and in a pipelined manner. In order to further reduce the overall computational efficiency and deployment cost of high-speed structured light measurement tasks, an FPGA camera architecture with parallel acquisition and processing is designed, and the FPGA camera is cooperated with the CPU to form a more efficient heterogeneous measurement system. For samples of different materials and shapes, the standard deviation of sub-pixel coordinates extracted is less than 0.65. With this architecture, it is possible to process video stream with one million pixels at 500FPS, and the power consumption is 2.566w. Experimental results of measuring blocks and steel pipes show that the measurement error is below 0.15 mm. The proposed algorithm and heterogeneous processing measurement architecture are applicable in engineering, especially for high-speed real-time 3D measurement.
科研通智能强力驱动
Strongly Powered by AbleSci AI