A 2.38 MCells/mm2 9.81 -350 TOPS/W RRAM Compute-in-Memory Macro in 40nm CMOS with Hybrid Offset/IOFF Cancellation and ICELL RBLSL Drop Mitigation

A dense compute-in-memory (CIM) macro using resistive random-access memory (RRAM) showing solutions to read channel mismatch, high I OFF , ADC offset, IR drop, and cell resistance variation is presented. By combining a hybrid analog/mixed-signal offset cancellation scheme and $I_{CELL}R_{BLSL}$ drop mitigation with a low cell bias target voltage, the proposed macro demonstrates robust operation (post-ECC bit error rate (BER $) \lt 5 \times 10^{-8}$ for 8WL CIM) while maintaining an effective cell density 1.03 – $33.1 \times$ higher than prior art and achieving 1.74 – $13.35 \times $ improved average MAC efficiency relative to the previous highest-density RRAM CIM macro.