电阻随机存取存储器
计算机科学
计算机硬件
量化(信号处理)
GSM演进的增强数据速率
最上等的
延迟(音频)
算法
人工智能
电气工程
物理
电信
工程类
天文
方位角
电压
作者
Tai-Hao Wen,Je-Min Hung,Hung-Hsi Hsu,Yuan Wu,Fu-Chun Chang,Chung-Yuan Li,Chih-Han Chien,Chin-I Su,Win-San Khwa,Jui-Jen Wu,Chung-Chuan Lo,Ren-Shuo Liu,Chih-Cheng Hsieh,Kea‐Tiong Tang,Mon‐Shu Ho,Yu-Der Chih,Tsung-Yung Jonathan Chang,Meng‐Fan Chang
标识
DOI:10.23919/vlsitechnologyandcir57934.2023.10185326
摘要
Tiny AI edge processors prefer using nvCIM to achieve low standby power, high energy efficiency (EF), and short wakeupto-response latency (T WR ). Most nvCIMs use in-memory computing for MAC operations; however, this imposes a tradeoff between EF and accuracy, due to MAC accumulationnumber (N ACU ) versus signal margin and readout quantization. To achieve high EF and high accuracy, we developed a systemlevel nvCIM-friendly control scheme and a nvCIM macro with two analog near-memory computing schemes. The proposed 28nm nonvolatile AI edge processor with 4Mb ReRAMnvCIM achieved high EF (27.2 TOPS/W), short T WR (3.19 ms), and low accuracy loss (<0.5%) The EF of the ReRAM-nvCIM macro was 38.6 TOPS/W.
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