Viscoelastic behavior of polishing pad: Effects on edge roll-off during silicon wafer polishing

In semiconductor device fabrication, surface flatness of silicon wafers has a significant impact on the chip yield. Hence, there is a strong demand to prevent the deterioration in surface flatness near the wafer edge due to edge roll-off during polishing. In the present study, we investigate the viscoelastic behavior of polishing pads and its effects on the uniformity of material removal distribution near the wafer edge. On the basis of the findings, we propose polishing conditions required to improve surface flatness near the wafer edge. The double-sided polishing experiments performed using silicon wafers reveal that the proposed polishing conditions effectively reduce edge roll-off.