Self-Aligned IGZO TFTs with Boron Implanted Source/Drain Regions

This study investigates techniques to realize self-aligned Indium-Gallium-Zinc Oxide (IGZO) TFTs that are not subject to gate-source/drain misalignment due to overlay error or process bias. The working source/drain electrodes in IGZO TFTs can be direct metal contact regions to the IGZO, however this typically requires several microns of gate overlap in order to provide ohmic behavior with minimal series resistance and ensure tolerance to overlay error. Boron ion implantation has been demonstrated to successfully dope IGZO, resulting in an estimated electron concentration level n ~ 1019 cm-3. Top-gate co-planar TFTs were fabricated using boron implantation to selectively form IGZO:B n+ regions, with the channel region masked by the gate electrode. A novel lithographic strategy to extend this technique to the more traditional bottom-gate staggered TFT configuration has also been explored which utilizes top-side exposure rather than a back-side through-glass exposure, and would enable self-aligned devices on non-transparent substrates. Details of the self-aligned top-gate TFTs, and the top-side exposure lithographic process will be presented.