Santu Kr. Giri,Sibaprasad Chakrabarti,Subrata Banerjee,Chandan Chakraborty
出处
期刊:IEEE Transactions on Industrial Electronics [Institute of Electrical and Electronics Engineers] 日期:2016-11-03卷期号:64 (3): 1873-1883被引量:82
标识
DOI:10.1109/tie.2016.2624721
摘要
This paper proposes a unique carrier-based pulse width modulation strategy for a three-level neutral-point-clamped inverter that works satisfactorily and with uniform convergence time over the full power factor (PF) range of the load variation. It has excellent control over capacitor voltages and mitigates low-frequency oscillations in the neutral point for the full PF range. First, an investigation is made to see how the load currents get modulated to generate compensating neutral current causing charging and discharging of dc-link capacitors. It is observed that when an additional modulating voltage signal that is in phase with the corresponding phase current is added in each phase, a neutral current is produced in the right direction which can be used to compensate for any prior unbalance in capacitor voltages. It is demonstrated that the performance of this scheme is insensitive to the load PF variation (full range from zero to unity). It performs satisfactorily throughout the entire linear modulation range and eliminates any undesirable low-frequency harmonic component in the compensating neutral current. The effectiveness of the proposed scheme is verified through simulation and experimental results by varying load PF as well as modulation index with both passive and motor loads.