One Micrometer Channel Length, Coplanar Polycrystalline InGaO Thin Film Transistors Exhibiting 85 cm2 V−1 s−1 Mobility and Excellent Bias Stabilities by Using Offset Engineering

Abstract The effect of N+ resistivity in the offset region, for ≈1 µm channel length coplanar, polycrystalline InGaO (PC‐IGO) thin‐film transistors (TFTs) is studied. The room temperature deposited amorphous IGO is solid phase crystallized at 450 °C. The PC‐IGO TFT exhibits a maximum effective field‐effect mobility (µ FE ) of ≈86.69 cm 2 V −1 s −1 , a threshold voltage of ≈1.5 V, and a subthreshold swing of ≈300 mV decade −1 , with remarkable stability under bias and temperature stress. The offset length ( L off ) is varied from 1 to 3 µm and their electrical performances are analyzed. Upon increasing the L off from 1 to 3 µm, the on current ( I on ) and the µ FE drops from 50.31 to 17.72 µA and 85.40 to 67.64 cm 2 V −1 s −1 , respectively, which can be attributed to a greater voltage drop in the L off , resulting in the reduction of effective V DS applied to the channel. Technology computer‐aided design simulations shows that at the sheet resistance of 14.5 Ω sq −1 . in the N+ offset region, the I on dependency disappears with the change in L off , which is attributed to the negligible voltage drop. These results provide valuable insight into optimizing N+ doping, for high‐performance, short‐channel coplanar oxide TFTs.