量子隧道
晶体管
CMOS芯片
场效应晶体管
电子线路
光电子学
消散
隧道场效应晶体管
电压
材料科学
电气工程
纳米线
集成电路
半导体
物理
工程类
热力学
作者
Adrian M. Ionescu,Heike Riel
出处
期刊:Nature
[Springer Nature]
日期:2011-11-01
卷期号:479 (7373): 329-337
被引量:2599
摘要
Power dissipation is a fundamental problem for nanoelectronic circuits. Scaling the supply voltage reduces the energy needed for switching, but the field-effect transistors (FETs) in today's integrated circuits require at least 60 mV of gate voltage to increase the current by one order of magnitude at room temperature. Tunnel FETs avoid this limit by using quantum-mechanical band-to-band tunnelling, rather than thermal injection, to inject charge carriers into the device channel. Tunnel FETs based on ultrathin semiconducting films or nanowires could achieve a 100-fold power reduction over complementary metal-oxide-semiconductor (CMOS) transistors, so integrating tunnel FETs with CMOS technology could improve low-power integrated circuits.
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