Burst-Mode FPGA Implementation and Error Location Analysis of Forward Error Correction for Passive Optical Networks

Forward error correction (FEC) based on Reed–Solomon coding for the burst-mode upstream traffic of passive optical networks (PONs) is analyzed in detail using flexible field-programmable gate arrays (FPGAs). In order to achieve true burst-mode transmission using FPGAs, specific architectural solutions are required. In particular, a burst-mode frame synchronizer and a burst-mode Reed–Solomon decoder are described in detail and analyzed experimentally within a state-of-the-art long-reach PON test-bed. During this analysis, the upstream FEC performance is impaired by introducing strongly correlated and localized errors within the burst through the reduction of the burst preamble duration. The observed FEC degradation is exhaustively analyzed by implementing on the FPGAs a tool for error location analysis and frame loss measurements. This investigation demonstrates the importance of understanding the error distribution within the burst in order to correctly estimate the FEC performance in PON upstream links.