N/P Split Boundary Profile Improvement in High K Metal Gate Dummy Poly Remove Process

With the development of VLSI(Very Large Scale Integration) manufacturing, multi-function gate highly integrates in small area, which requests our process with the smaller CD(Critical Dimension) and the more precise profile control. NMOS and PMOS neighboring design can minimize CD, but it's great challenge to get vertical profile on N/P border. We can use TEM(Transmission Electron Microscope) to observe its profile and WAT(wafer acceptance test) to test its performance, mainly about Vt(Threshold Voltage) related parameter. This paper expounds a kind of advanced metal gate control mode. Through dry etch process further studied to improve N/P split metal gate boundary profile, include gas, power adjustment, we can get the vertical profile.