材料科学
复合数
振动
复合材料
结构工程
声学
工程类
物理
作者
Mingming Lu,Shuaijie Zhai,Ruiqi Zhou,Limin Zhang
标识
DOI:10.1149/2162-8777/ada3a1
摘要
Abstract Using 3-D TCAD simulations, the analog/RF/DC performance of vertically stacked gate all around (GAA) nanosheet field effect transistors (NSFETs) was analysed and evaluated. The effects device design parameters such as nanosheet width (WNS), nanosheet height (HNS), no. of nanosheets, gate length (LG), and oxide thickness (tox) on the analog /RF /DC performance of a vertically stacked GAAFET were investigated. We analysed the impact of these device design parameters on DC figure of merits such as delay and power consumption and optimize the energy delay product (EDP). The impact of mentioned device design parameters on gm (transconductance), cut off frequency (fT), and maximum oscillation frequency(fmax) and intrinsic gain was analysed. A thorough CV analysis was performed to evaluate the impact of device design parameters on analog/RF figure of merits. We obtained an optimized set of device design parameters for enhanced analog/RF/DC performance of GAA-NSFET.
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