Extensive research has been conducted on deep learning-based methods for chip surface defect detection to enhance chip production efficiency and product quality. However, less attention has been given to internal defect detection methods after chip packaging, and practical issues still need to be addressed. Firstly, the detection method needs to have higher real-time performance due to the high degree of automation and large output in chip production. Additionally, the internal image of the chip is generated by X-ray inspection equipment, resulting in a grayscale image that lacks the color characteristics of the RGB image of chip surface. Finally, the deep learning-based detection methods face a challenge due to the very small pixel percentage of the defective chip region. To tackle these challenges, we introduce a highly efficient network named Atrous Spatial Pyramid Pooling (ASPP) and Spatial Attention UNet (ASSA-UNet), which integrates multi-scale feature fusion and attention mechanisms to detect chip internal defects. We thoroughly evaluate the performance of our proposed model on a self-built dataset(CIDX-ray) and compare it with other methods. The experimental results demonstrate the efficient and accurate segmentation of chip internal defects using our proposed method.