中间层
可靠性(半导体)
模具(集成电路)
炸薯条
制造工程
计算机科学
供应链
汽车工程
路径(计算)
过程(计算)
嵌入式系统
光学(聚焦)
可靠性工程
包装工程
通过硅通孔
工程类
机械工程
电气工程
材料科学
操作系统
电信
图层(电子)
功率(物理)
薄脆饼
复合材料
物理
光学
法学
蚀刻(微加工)
量子力学
政治学
作者
Jens Oswald,Christian Goetze,Shan Gao,ShunQiang Gong,Juan Boon Tan,Rick Reed,YoungRae Kim
标识
DOI:10.1109/eptc.2015.7412358
摘要
Silicon interposers offer a viable path to perpetuating the trend of increased chip performance per die area, as projected by Moore's law, which can no longer be met by simply shrinking feature sizes. The enablement of such packaging solutions not only requires new processes for Through Silicon Vias (TSV), thin die manufacturing, assembly and test, but also a well-defined concept of process and supply chain. In a joint work between GLOBALFOUNDRIES and Amkor Technology, a test vehicle with focus on processing aspects and chip package interaction (CPI) has been designed, manufactured, tested, and stressed. The findings and data have been used for the definition of a common interposer platform, now available for customers. This paper describes the design and manufacturing concept of the test vehicle, discusses challenges for interposer processing and test, and shares reliability results.
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