Physical design guidelines to minimize area-specific ON-resistance for rated ON-current and breakdown voltage of GaN power HEMTs

Abstract In this article, we report on the development of an analytical model to estimate area-specific ON-state resistance ( R ds,on ) of GaN-based power high electron mobility transistor (HEMT) using rated device specifications—ON-state drain current ( I ON ) and maximum operating drain-to-source voltage ( V DSO )—as input parameters. The rated I ON and V DSO are considered as fractions k and S , of the maximum possible drain current ( I DS,max ) and breakdown voltage ( V BR ), respectively, deliverable by the power device. The developed model is utilized to obtain the optimal physical design space parameters for a comb-like power HEMT design. Due consideration has been given to the trade-off between R ds,on and area-specific R ds,on of the transistor, device processing limitations for all the physical device parameters. The developed model has been validated with experimental results of prior literature. Our calculations impose a lower-bound for the best possible R ds,on as well as the area-specific on-resistance product ( R ds,on × AA ) that can be obtained for a given starting channel sheet resistance in the comb architecture for a desired I ON − V DSO rating.