Generalized Resistive DAC Analysis Through Unitized T-Network Element

This paper proposes a method of using a unit T-network as the element to decompose and analyze any resistive Digital to Analog Converter (DAC) into series connected T-networks. DACs have been analyzed thoroughly and presented in multiple books [1]. Choosing a DAC topology that suits the application needs strong intuition on how INL/DNL change with topologies or thorough analysis of each topology from basic principles. The elegance and simplicity of using T-network for analysis and intuitive understanding of any resistive DAC is demonstrated. Cascading T-elements and using standard advantages of 2 port ABCD parameters is not sufficient for the given DAC topologies. So, a new method is introduced to transform 2 port equations into 3-node voltage equations. This helps in analyzing the generalized DAC structure while retaining the advantages of the cascade connection. To illustrate the effectiveness and advantage of the method, examples of application of this method to find the INL of R-2R and Thermometric DACs due to resistor mismatch is shown. Intuitive analysis and simple extension of the worst case INL/DNL and code corresponding to it is shown for a R-2R DAC and extension to a Segmented DAC by a simple substitution of coefficients without rederivation is demonstrated.