edAttack: Hardware Trojan Attack on On-Chip Packet Compression

Modern MultiProcessor System-on-Chip (MPSoC) designs use third-party intellectual property (IP) to reduce design costs and meet deadlines. In a Network-on-Chip (NoC)-based MPSoC, most NoC components that connect multiple IPs, are third-party IPs. NoC carries cache misses and cache blocks as request-reply packets. Since reply packets may contain repetitive data patterns, compressing them reduces latency and energy consumption. Nevertheless, some IPs in NoC may contain Hardware Trojans (HT). While researchers investigated the possibility of HTs in NoC routing protocols and Network Interfaces (NIs), this work investigates the prospect of a new HT in NoC routers, or NIs, that targets on-chip packet compression techniques.