德拉姆
覆盖
计量学
平版印刷术
计算机科学
极紫外光刻
与非门
还原(数学)
堆栈(抽象数据类型)
电子工程
材料科学
浸没式光刻
计算机硬件
节点(物理)
图层(电子)
光电子学
抵抗
光学
逻辑门
工程类
纳米技术
物理
算法
程序设计语言
结构工程
几何学
数学
作者
Shlomit Katz,Suk Won Park,Joonsang You,Hyunjun Kim,Hong Goo Lee,Dongyoung Lee,Hongbok Yeon,Joon-Seuk Lee,Sang-Ho Lee,Jae Wook Seo,Dor Yehuda,Junho Kim,Hongcheon Yang,DoHwa Lee,Nanglyeom Oh,DongSub Choi,Wayne Zhou,Hedvi Spielberg,Ohad Bachar,Jungchan Kim
摘要
As the semiconductor industry rapidly approaches the 3nm lithography node, on-product overlay (OPO) requirements have become tighter, which drives metrology performance enhancements to meet the reduction in overlay (OVL) residuals. The utilization of multiple measurement wavelengths in Imaging- Based Overlay (IBO) has increased in the past few years to meet these needs. Specifically, the color per layer (CPL) method allows for optimizing the OVL measurement conditions per layer, including focus, light, wavelength (WL), and polarization customization which enhance the metrology results. CPL is applicable for multiple technology segments (logic, foundry, DRAM, 3D NAND), relevant for different devices (DRAM high stack layers, NAND channel holes, etc.), and can work well for both thin and thick layers for standard and EUV lithography processes. In this paper, we will review the benefits of CPL for multiple DRAM and NAND critical layers. We will describe how CPL can contribute to measurement accuracy by quantifying the OVL residual reduction in comparison to single-wavelength (SWL) measurement conditions.
科研通智能强力驱动
Strongly Powered by AbleSci AI