E-beam Probing: A High-Resolution Technique to Read Volatile Logic and Memory Arrays on Advanced Technology Nodes

Fault isolation techniques continue to become more sophisticated to enable debug of next generation processors. Although these techniques are developed for the purpose of debug, they can also be used with malicious intent by an adversary. This paper describes a newly developed high-resolution E-beam fault isolation technique. The tool has the capability to read logic states with spatial resolution sufficient for future processes while keeping the die fully functional. The technique is demonstrated on volatile memory cells.