焊接
空隙(复合材料)
材料科学
回流焊
模具(集成电路)
电子包装
冶金
真空包装
复合材料
倒装芯片
机械工程
纳米技术
胶粘剂
工程类
图层(电子)
作者
Siang Miang Yeo,Ho-Kwang Yow,Keat Hoe Yeoh,Shahrul Haizal bin Ishak
出处
期刊:IEEE Transactions on Components, Packaging and Manufacturing Technology
[Institute of Electrical and Electronics Engineers]
日期:2022-07-12
卷期号:12 (8): 1410-1420
被引量:8
标识
DOI:10.1109/tcpmt.2022.3189995
摘要
The undesirable impacts of solder void defects on the reliability of die packages have prompted stringent requirements on solder void size control in the semiconductor packaging industry. Vacuum reflow process using Pb95Sn5 solder was studied, where critical process parameters within temperature and pressure profiles were varied for enhanced solder void size reduction, in comparison to conventional reflow process. Higher reflow temperature profile, faster pressure pump-down rate, and longer vacuum dwell time above threshold levels are critical conditions required for consistently achieving minimum solder void sizes well below the industry criteria. Application of threshold conditions using large volume reflow oven with industrial settings has achieved the single and the total solder void size over die size well below the standard 2.5% and 5% requirements, respectively, with majority of the samples attained the single and the total solder void size over die size below 1% and 2%, respectively. Solder bond line thickness exhibited a significant influence on the solder void size reduction and thus needs to be administered appropriately during die packaging assembly to achieve the maximum solder void size reduction.
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