Shear localization sensitivity analysis for Johnson–Cook constitutive parameters on serrated chips in high speed machining of Ti6Al4V

Abstract This research aims to investigate the influence of material constitutive parameters on the serrated chip formation during high speed machining (HSM) of Ti6Al4V alloys with finite element simulations and cutting experiments. The Johnson–Cook (JC) constitutive model and JC fracture model with an energy-based ductile failure criterion are adopted to simulate the HSM process. Five JC constitutive model parameters such as initial yield stress, hardening modulus, strain hardening coefficient, strain rate dependency coefficient, and thermal softening coefficient are included in this research. Shear localization sensitivity is novelly proposed to describe variations of serrated chips under different JC constitutive model parameters. Shear localization sensitivity is subdivided into chip serration sensitivity and chip bending sensitivity. The research finds that the influences of initial yield stress and thermal softening coefficient parameters on the chip serration and bending are much more prominent than those of the rest three JC constitutive model parameters. With initial yield stress or hardening modulus in JC constitutive model increasing, the chip serration sensitivity increases and the chip bending sensitivity decreases. However, the influences of the rest three parameters on chip serration sensitivity are opposite. High speed orthogonal cutting experiments of Ti6Al4V are carried out to validate the simulation results under different cutting speeds ranging from 50 m/min to 3000 m/min and fixed uncut chip thickness with 0.1 mm. The results show that the serrated degree of chips increases with the cutting speed increasing until the chips become completely fragmented. The cutting speed break point of chip morphology from serrated to fragmented ones for Ti6Al4V is about 2500 m/min. The average cutting force decreases with the cutting speed increasing, which is a prominent advantage for HSM. This paper can help to get deeper insights into the serrated chip formation mechanism in HSM.