材料科学
光电子学
可靠性(半导体)
金属浇口
逻辑门
氮化镓
大气温度范围
肖特基势垒
肖特基二极管
和大门
栅氧化层
电子工程
电气工程
晶体管
纳米技术
工程类
二极管
电压
物理
功率(物理)
量子力学
图层(电子)
气象学
作者
Andrea Natale Tallarico,NULL AUTHOR_ID,Matteo Borga,NULL AUTHOR_ID,NULL AUTHOR_ID,Thibault Cosnier,Stefaan Decoutere,NULL AUTHOR_ID,NULL AUTHOR_ID
出处
期刊:IEEE Electron Device Letters
[Institute of Electrical and Electronics Engineers]
日期:2024-07-08
卷期号:45 (9): 1630-1633
标识
DOI:10.1109/led.2024.3424563
摘要
In this letter, we report an approach to improve the forward bias gate reliability of Schottky gate p-GaN HEMTs. In particular, a gate layout solution, namely Gate Within Active Area (GWA), aimed at improving the high-temperature time to failure (TTF), is proposed and validated. This solution allows to avoid the exposure of the gate finger (p-GaN/metal) to the nitrogen-implantation needed for termination and isolation purposes. GWA devices feature a significantly improved gate reliability at high temperature with respect to the reference ones, under both DC and pulsed stress tests. Finally, it is demonstrated that the Schottky gate p-GaN HEMTs show a positive temperature-dependent gate TTF in a range up to 150 °C, confirming the crucial role of impact ionization on the gate failure.
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