Differential high gain transimpedance amplifier with –3dB-bandwidth extension

In this article, a three-stage transimpedance amplifier (TIA) is designed and optimized to convert the input current to the output voltage and amplify it. The amplifier consists of a single-to-differential cross-coupled modified RGC (Regulated Cascode) input stage. The proposed TIA adopts a gm-boosted technique in the input stage by adding an auxiliary circuit that increases the –3dB-bandwidth by about 580 MHz, which lowers the input impedance resulting in a high input pole frequency. Also, an fT doubler stage and a third stage with minimum power consumption for fT doubling (second stage) and increasing gain are used respectively. The area consumption is reduced by replacing the conventional fT doubler topology resistors with transistors. Both stages of designed amplifiers have a variable gain mechanism. In the post-layout simulation, the circuit has a variable gain mechanism and a gain of up to 99 dBΩ with a –3dB-bandwidth of 720 MHz and an input-referred noise of 11.42 PA/√Hz. The post layout simulation is performed in 180 nm CMOS technology. The circuit's core power consumption is 6.0624 mW and occupies 0.051 mm × 0.06136 mm of area.