Firing Analysis of a Memristive Synapse-Coupled Heterogeneous Neural Network with Activation Gradient

突触 人工神经网络 神经科学 记忆电阻器 计算机科学 生物系统 拓扑(电路) 物理 人工智能 数学 生物 组合数学 量子力学
作者
Kailing Zhu,Yulong Bai,Jiawei Jiang,Qianqian Dong
出处
期刊:International Journal of Bifurcation and Chaos [World Scientific]
卷期号:34 (14)
标识
DOI:10.1142/s0218127424501815
摘要

Different functional areas of the brain are composed of varying numbers of heterogeneous neurons, which transmit signals via synapses. As an electronic element, memristor can store resistance values and simulate the memory properties of synapses. At present, research on coupling heterogeneous neurons through memristive synapses is relatively scarce. A heterogeneous neural network model is proposed in this paper, where the memristor acts as a coupled synapse between a Two-Dimensional Hindmarsh–Rose (2D HR) neuron and a Three-Dimensional Hopfield Neural Network (3D HNN) neuron. The activation function of the neural network can simulate the firing behavior and nonlinearly transform the input signals. Therefore, an activation gradient is added to the 3D HNN neuron. In this paper, heterogeneous neurons and activation gradients are simultaneously introduced into the neural network. The model provides a more realistic artificial neural network, which can simulate the diversity of neurons in the brain. The firing behaviors varying with the coupling strength between the memristor and neurons are analyzed, and the influence of the activation gradient on the neural network model is studied. Various firing patterns are discovered, including chaotic/periodic spiking, chaotic/periodic bursting, stochastic bursting and transient chaotic spiking. By observing the Lyapunov Exponents (LEs) and bifurcation diagram under the initial values of two memristors, it is found that there are infinitely many attractors, indicating the extreme multistability firing in this heterogeneous neural network model. Finally, circuit design is implemented by Multisim simulation, and hardware implementation is completed on the Field-Programmable Gate Array (FPGA) platform.

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