Investigation of Post-Bond Distortion in Direct Wafer Bonding

Direct wafer bonding process is used in semiconductor manufacturing for heterogeneous integration of devices. When two silicon wafers are directly bonded together, the alignment along the bonded interface is critical to device performance and yield. This paper studies the relative alignment, or post-bond distortion, of a direct wafer bonding process using finite element simulation method. The methodology of constructing a 2D axisymmetric model to calibrate a 3D model is discussed. The simulation results showed that the post-bond distortion was sensitive to upper wafer pre-bond shapes and does not depend on lower wafer shapes. The simulation models enable reduced hardware development costs and time.