Physics-Based Compact Model of Current Stress-Induced Threshold Voltage Shift in Top-Gate Self-Aligned Amorphous InGaZnO Thin-Film Transistors

Threshold voltage shift ( $\Delta {V}_{\text{T}}$ ) under various current stress (CS) conditions need to be quantitatively studied in self-aligned top-gate amorphous InGaZnO (a-IGZO) thin-film transistors (TFTs). Here, we propose a stretched-exponential function (SEF)-based $\Delta {V}_{\text{T}}$ model that can be applied to various combinations of ${V}_{\text{GS}}$ and ${V}_{\text{DS}}$ . The proposed model indicates the characteristic electron trapping time constant $\tau _{1}$ is inversely proportional to ( ${V}_{\text{GS}} - {V}_{\text{T}}$ ). In contrast, the time constant $\tau _{2}$ is directly proportional to the square root of ( ${V}_{\text{DS}}+{V}_{\text{bi}}$ ), presumably due to the local donor creation by a lateral electric field. The proposed model was verified experimentally in various ${V}_{\text{GS}}$ and ${V}_{\text{DS}}$ configurations. Further, it is confirmed that the lateral electric field dominantly influences donor creation near the drain.