A Wide-Input-Range Multi-phase Clock Generator Design for CMOS Image Sensors

This paper proposes a novel phase-interpolator-based multi-phase clock generator, which could be applied in the single slope ADCs of the CMOS image systems. To widen the input range of the multi-phase clock generator, a fast reset method for the phase interpolator is proposed. Besides that an improvement using RC-based phase interpolator is also provided to deal with the deviation of the power supply voltage. The simulation results in CMOS 55nm process show that the duty cycle distortion of the proposed design is within ±3% when the input frequency ranges from 100MHz to 250MHz and the supply voltage ranges from 1V to 1. 4V.