LDMOS
宽带
负载拉力
放大器
基站
计算机科学
电子工程
W-CDMA
阻抗匹配
匹配(统计)
拓扑(电路)
功率(物理)
电阻抗
多尔蒂放大器
信号(编程语言)
电气工程
射频功率放大器
电信
工程类
码分多址
数学
电压
晶体管
物理
带宽(计算)
统计
量子力学
程序设计语言
作者
Xiaolong Yue,Bo Zhang,Xin Liu,Yongqiang Zhou,Lei Zhang
标识
DOI:10.23919/eumc48046.2021.9338156
摘要
An optimized wideband load impedance selection approach and recursive four-way Doherty power amplifier (DPA) combining topology are introduced in this paper. Theoretical analysis indicates low Q-factor matching network can be achieved adopting this approach, and it will be easier to obtain high efficiency adopting recursive structure. For verification, a 1000W wideband recursive four-way DPA using LDMOS devices operating from 760MHz to 960MHz is implemented. The prototype exhibits the peak power between 59.5dBm and 60.5dBm and an average drain efficiency between 48% and 54% with 9.9 PAR WCDMA signal. It can be linearized under -51dBc level with 2C-LTE signal at an average output power of 50dBm with 200MHz carrier spacing.
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