材料科学
薄膜晶体管
并五苯
磁滞
栅极电介质
光电子学
电介质
晶体管
薄膜
复合材料
凝聚态物理
纳米技术
电气工程
电压
图层(电子)
工程类
物理
作者
Do Kyung Hwang,Kimoon Lee,Jae Hoon Kim,Seongil Im,Ji Hoon Park,Eugene Kim
摘要
The authors report on the electrical reliabilities of poly-4-vinyl phenol (PVP) and SiO2 gate dielectrics for pentacene thin-film transistors (TFTs). SiO2 films were grown by dry oxidation and PVP films were prepared by spin coating and subsequent cross-linking at 175°C for 15min. The pentacene TFTs with the PVP cured for 15min exhibited a large hysteresis and an abnormal drain-current increase under a gate bias stress over time, while the other TFT with SiO2 displayed a small hysteresis but its drain current decreases with time. The hysteresis behaviors induced by PVP and SiO2 were opposite to each other in the gate bias swing direction, due to the difference in hysteresis mechanism between the two types of TFTs. Comparing their hysteresis behavior, the authors fabricated a far more reliable pentacene TFT with PVP by extending the PVP curing time to 1h. Our improved device with PVP exhibited no hysteresis and persistent toughness to the gate bias stress.
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