Effect of $\hbox{SiN}_{x}$ Gate Dielectric Deposition Power and Temperature on a-Si:H TFT Stability

The stability of thin-film transistors (TFTs) of hydrogenated amorphous-silicon (a-Si:H) against gate-bias stress is improved by raising the deposition power and temperature of the silicon nitride gate dielectric. We studied the effects of power density between 22 and 110 mW/cm ² and temperature between 150degC and 300degC . The time needed to shift the threshold voltage by 2 V varies by a factor of 12 between low power and low temperature, and high power and high temperature. These results highlight the importance of fabricating a-Si:H TFTs on flexible plastic with the SiN _x gate dielectric deposited at the highest possible power and temperature.