冯·米塞斯屈服准则
薄脆饼
材料科学
田口方法
压力(语言学)
有限元法
电子包装
钝化
温度循环
模具(集成电路)
结构工程
复合材料
机械工程
电子工程
图层(电子)
热的
工程类
光电子学
气象学
哲学
纳米技术
物理
语言学
作者
Shichao Yuan,Anwen Cai,Huiping Yu,Daquan Yu,Min Xiang,Fei Qin
标识
DOI:10.1109/icept.2018.8480431
摘要
In the electronics packaging process, warpage and thermal stress are two important causes which lead to packaging failure. In this paper, ABAQUS is used to perform three-dimensional numerical simulation of eSiFo packaging products from the thermodynamic point of view. The effects of different structural parameters on wafer warpage and thermal stress in electronic packages are simulated. In the simulation part, single factor analysis, Taguchi orthogonal experiment design and finite element analysis are combined to obtain the optimized process parameters and perform simulation analysis. The result shows that the structural parameter that has the greatest influence on the von Mises stress value of the wafer is the window size. And the structural parameter that has the greatest influence on the wafer warpage is the Die thickness. The thickness of the adhesive layer and the thickness of the passivation layer have a relatively small effect on the von Mises stress and the warpage value of the wafer. Under the optimized process parameters, the maximum von Mises stress and the maximum warpage value are much smaller than the initial process.
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