Investigations of SiC MOSFET Short-Circuit Failure Mechanisms Using Electrical, Thermal, and Mechanical Stress Analyses

In this study, unique short-circuit failure mechanisms in 1.2-kV SiC metal–oxide–semiconductor field-effect transistors (MOSFETs) at 400 and 800-V dc bias were investigated using experiments and numerical TCAD simulations, taking electrical, thermal, and mechanical stress into account. It was found that the fracture of the interlayer dielectric, caused by high mechanical stress due to different thermal expansion rates, is the source of failure in the 400-V short-circuit transient. The activation of the parasitic bipolar junction transistor under extreme high temperature was confirmed to be the failure mechanism in the 800-V short-circuit transient.