A 52MHz And 155MHz Clock-recovery PLL

A monolithic phase-locked loop recovers clock and retimes NRZ data. At 155MHz, maximum-density data, random jitter in the recovered clock is 2.3 degrees rms. A 2⁷-1 data code reveals 3.5 degrees rms pattern jitter. At 52MHz static phase error is 2 degrees. Loop bandwidth is 0.1% of clock when data density is 0.5. The device is fabricated on a 3.5GHz bipolar process including laser-trimmed silicon-chromium thin-film resistors. Power is l 15mA from 5V supply. The device requires only a single external capacitor for operation. Unlike prior art, no crystal or tank is required. No external frequency reference is required This device is monolithic. Jitter is specified.