电子工程
CMOS芯片
计算机科学
数据转换
时间数字转换器
数字电子学
转换器
计算机体系结构
电子线路
工程类
抖动
电气工程
计算机硬件
电压
时钟信号
作者
Jakub Szyduczyński,Dariusz Kościelnik,Marek Miśkowicz
出处
期刊:Measurement
[Elsevier]
日期:2023-06-01
卷期号:214: 112762-112762
被引量:8
标识
DOI:10.1016/j.measurement.2023.112762
摘要
Time-to-digital converters (TDCs) are key components of time-mode circuits and enablers for digital processing of analog signals encoded in time. Since design of time-mode circuits facilitates replacing analog blocks with digital circuitry, TDCs pave the way to hardware-efficient and purely digital architectures in deep-submicron semiconductor technology. The design and implementation of modern TDCs is heterogeneous, shaped in multiple directions, and driven by CMOS process downscaling along with application demands. The substantial research effort is made in more intensive digital implementations, optimization of techniques for high resolution, increasing input range and linearity, reduced conversion time, power consumption and silicon area. The calibration and mismatch-tolerant, as well as anti-PVT-variation and anti-metastability design techniques are of growing importance in order to alleviate imperfections of nanoscale CMOS technologies. The paper surveys recent developments of time-to-digital conversion techniques to give a possibly comprehensive picture of major trends and design advancements. Finally, we highlight TDC design challenges for cutting-edge applications such as All-Digital Phase Locked Loops for high data rate wirelesss communication systems operating in the millimeter-wave band.
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