降压式变换器
死时间
电压
探测器
发电机(电路理论)
计算机科学
门驱动器
时钟发生器
材料科学
电子工程
控制理论(社会学)
电气工程
功率(物理)
工程类
电子线路
物理
控制(管理)
量子力学
人工智能
时钟信号
作者
Giao Huu Thuc,Ching‐Jan Chen
标识
DOI:10.1109/apec43580.2023.10131397
摘要
This paper proposes a gate driver IC for a GaN-based synchronous buck converter with a double-sided adaptive dead-time generator (DTG) to improve the converter efficiency with conventional fixed or single-sided DTG. It contains two main sub-blocks such as the phase error detector (PED) and the coarse/fine controllers. Applying the edge detection principle, the proposed dead-time control can minimize the dead-time and reverse conduction loss on both edges of the switching voltage, Vx, of a 1MHz 12 V to 5 V buck converter using e-mode GaN devices for 0.2 to 1 A load current range. The designed IC is fabricated with TSMC 0.18 µm HVG2 process. According to the post-simulation, the minimum dead time at 1 A load current is 28 ps. Compared with a 10 ns fixed DTG and single-sided DTG, efficiency is improved by 10% and 6%, respectively.
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