Cleaning processes draw considerable attention in integrated circuit manufacturing because of the rapid development of technology nodes. Bare silicon wafer cleaning after chemical mechanical polishing (CMP) is one of the most difficult processes used to meet the extremely strict industrial requirements. Herein, the silicon wafer cleaning mechanism is studied in detail. The effects of megasonic and brush cleaning on nanoparticle removal are both analysed through experiments and simulations. The experimental results show that chemical concentration, megasonic vibration power, and brush clamp gap all significantly affect the cleaning performance, and that excessive megasonic power reduces the cleaning performance because more defects are introduced. A model of megasonic nozzle trajectory is also proposed, and optimized parameters, especially the relative velocity between the wafer rotation and nozzle movement, are critical to removing nanoparticles effectively. Furthermore, analysis of combining megasonic and brush cleaning shows that including megasonic cleaning improves the wafer cleaning performance by several orders of magnitude. Based on the optimized cleaning conditions, an ultraclean wafer surface is achieved after CMP.