Threshold Voltage Modulation and Gate Leakage Suppression of Enhancement‐Mode GaN HEMT by Metal/Insulator/p‐GaN Gate Structure

Herein, a metal/insulator/p‐GaN gate HEMT (MIP‐HEMT) with Si 3 N 4 gate dielectric layer is fabricated. Compared to the conventional p‐GaN HEMT, the MIP‐HEMT has a higher threshold voltage ( V th ) of 4.8 V and better gate leakage suppression. The mechanism of threshold voltage increase in MIP‐HEMT is elucidated through an analysis of the electric field distribution in the gate region and the proposed gate capacitance model. Furthermore, MIP‐HEMTs with gate dielectric layers of varying dielectric constants and thicknesses are designed and simulated. The obtained results lead to the derivation of an empirical formula for the threshold voltage of the MIP‐HEMT under ideal dielectric/p‐GaN interface conditions, in relation to the dielectric constant and thickness of the gate dielectric layer. Additionally, simulations are conducted on the MIP‐HEMT incorporating fixed charges at the dielectric/p‐GaN interface, and the impact of interface charges is investigated. This refinement enables a more accurate prediction of the MIP‐HEMT's threshold voltage. Conclusively, MIP‐HEMTs can effectively modulate the threshold voltage by manipulating the parameters of the gate dielectric layer, thereby extending the threshold voltage range of conventional enhancement‐mode devices.