Semiconductor Wafer Defect Classification Using Support Vector Machine with Weighted Dynamic Time Warping Kernel Function

Semiconductor wafer maps provide vital information and clues to monitor and better understand the quality issues in the underlying manufacturing process. In post-fabrication, each chip undergoes a series of quality checks to determine whether the chip is in functional or defective state. Since each defect pattern is unique, automatically characterizing the various defect patterns in wafer map can provide significant insights to process engineers towards mitigating manufacturing defects and improve the effective yield rate. In this paper, we present a novel data mining and optimization-based supervised learning algorithm, called support vector machines with weighted dynamic time warping kernel (SVM-WDTWK), to classify defect patterns on semiconductor wafers. SVM-WDTWK provides a flexible and robust matching algorithm for time series classification, leading to an accurate match between non-aligned time series data. We present a numerical comparison to show that the proposed SVM-WDTWK algorithm is superior to several existing techniques on defect pattern classification on semiconductor wafer maps.