计算机科学
现场可编程门阵列
信号(编程语言)
噪音(视频)
滤波器(信号处理)
降噪
Verilog公司
数字滤波器
自适应滤波器
信噪比(成像)
梳状滤波器
电子工程
人工智能
模式识别(心理学)
计算机硬件
工程类
计算机视觉
算法
电信
图像(数学)
程序设计语言
作者
Amit Bakshi,Mamata Panigrahy,Jitendra Kumar Das
标识
DOI:10.1109/ises52644.2021.00061
摘要
An Electrocardiogram (ECG) is a bioelectrical signal that reflects the state of the heart based on the potential changes in the heart. The ECG signal is a widely used method for the early detection and evaluation of cardiovascular disease (CVD). Different types of noise can contaminate the ECG signal while recording, which can lead to a wrong diagnosis. As a result, a clear ECG signal is essential for effective CVD diagnosis. This paper is about designing an efficient ECG denoising technique using a field programmable gate array (FPGA). To denoise the ECG signal, a High Pass Filter, Moving Average Filter, and Savitzky-Golay Filter is used. The designed filters are tested on different ECG signals taken from the MIT-BIH database by mixing different types of noise and the performance is analyzed using several characteristics such as SNR, MSE, and COR of the filter output signal. The system is implemented using Verilog HDL and simulated on the Vivado simulator.
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