蚀刻(微加工)
小型化
薄脆饼
抵抗
材料科学
光电子学
炸薯条
反应离子刻蚀
芯片级封装
干法蚀刻
图层(电子)
纳米技术
电气工程
工程类
作者
Yulong Ren,Zheng Huang,Fei Geng,Peng Sun
标识
DOI:10.1109/icept.2018.8480778
摘要
With the development of semiconductor technology, Bosch etching technology is more and more used in 2.5D multi-die integration and 3D wafer level chip size package. Bosch etching can get a vertical via with anisotropic, which helps to promote miniaturization. Bosch etching process has a new challenge for large open rate and depth applications, such as PCR (polymerase chain reaction) chip and optical fingerprint chip scale package. This paper introduces some experiments with optimizing parameters, including chuck temperature, photo resist layer thickness and bias power. In this study, it is successful to develop a through-hole with 45% open rate and 350 um depth. The selectivity can be above 30:1 with 17 um photo resist layer under 5°C chuck temperature. The etch rate can be 4.6 um/min with 3.1% uniformity in a good profile. At the same time, the scallop is about 50 nm. The bottom via open is 3 um larger than the top via with 51 um.
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