放大器
符号
噪音(视频)
CMOS芯片
晶体管
数学
算法
拓扑(电路)
计算机科学
电气工程
物理
组合数学
光电子学
工程类
人工智能
算术
电压
图像(数学)
作者
Min-Seok Baek,Han‐Woong Choi,Joon-Hyung Kim,Jae‐Hyeok Song,Jae-Eun Lee,Jeong-Taek Son,Choul‐Young Kim
标识
DOI:10.1109/lmwt.2023.3348529
摘要
This letter presents a Ku -band high-input 1-dB compression point (IP $_{\mathrm{1dB}}$ ) and low-power low-noise amplifier (LNA). The large-transistor technique is employed to enhance IP $_{\mathrm{1dB}}$ with low noise figure (NF) for first stage. Differential Class-AB topology is adopted to improve the output 1-dB compression point (OP1dB) and lower power consumption for output stage. To validate the proposed approach, we implemented a two-stage common-source (CS) LNA using 65-nm bulk complementary metal–oxide–semiconductor (CMOS) technology. Experimental results achieved a minimum NF of 1.94 dB and peak gain of 19.98 dB. The measured IP $_{\mathrm{1dB}}$ is $-$ 7.8 dBm at 13 GHz, the highest among modern CMOS Ku -band LNAs. The LNA operates with a power consumption of 10 mA at a 1-V supply voltage and occupies a compact core size of 0.80 $\times$ 0.26 mm $^{2}$ .
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