A Second-Order DT Delta-Sigma Modulator with Noise-Shaping SAR Quantizer

This paper presents a second-order discrete-time (DT) delta-sigma (ΔΣ) modulator. A fully passive noise-shaping (NS) successive-approximation-register (SAR) analog-to-digital converter (ADC) is employed to increase the noise shaping order without using an additional amplifier, while also performing quantization. The prototype ADC fabricated in a 28 nm CMOS process achieves a 101.1 dB dynamic range (DR) and 97.6 dB peak signal-to-noise and distortion ratio (SNDR) over a signal bandwidth of 500Hz with OSR of 512. The modulator occupies an active die area of 0.066mm ² , and its power consumption is 15.2 μW at 1.0V supply voltage, resulting in a Schreier's figure of merit (FoMs) of 176.3 dB.