绝缘体上的硅
薄脆饼
半导体
材料科学
光电子学
硅
数码产品
制作
电子线路
纳米技术
电介质
工程物理
半导体器件
绝缘体(电)
电子工程
电气工程
工程类
图层(电子)
病理
替代医学
医学
作者
G. K. Celler,S. Cristoloveanu
摘要
Silicon-on-insulator (SOI) wafers are precisely engineered multilayer semiconductor/dielectric structures that provide new functionality for advanced Si devices. After more than three decades of materials research and device studies, SOI wafers have entered into the mainstream of semiconductor electronics. SOI technology offers significant advantages in design, fabrication, and performance of many semiconductor circuits. It also improves prospects for extending Si devices into the nanometer region (<10 nm channel length). In this article, we discuss methods of forming SOI wafers, their physical properties, and the latest improvements in controlling the structure parameters. We also describe devices that take advantage of SOI, and consider their electrical characteristics.
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