Trends of Silicon Wafer Specifications vs. Design Rules in ULSI Device Fabrication. Particles, Flatness and Impurity Distribution Deviations

Previously described empiricahelations between the design rules and the past trends of the smallest size㎝d number of particles，warpage，LTV(Local Thickness Variation)，OSF(Oxidation-induced Stacking Fault density)and sheet resistance deviation capable of causing a scrapping die are discussed with theoretical considerations for DRAM(Dynamic Rξmdom Access Memory)，gate amy devices md microprocessorunit devices。Underthe assumption thatthese trends will condnue to the generation ofthe smallest design-rule transistor operating at room temperature， the target wafer specifications and future technicahssues arepredicted． 1．lntroduction The sustained rate of advance of semiconductor industry requires moreprecisely-controlled equipment and highlyspecified materialsl)， thereby the semiconductorindustry faces lowerretum-oninvestments due to the higher cost ofproducts against their market prices．To solve the problem，all specifications of equipment and materials should be reviewed to ehminate over-or extra-specified items， From such viewpoints，conceming the starting material silicon-wafer specif量cadons， the author described previously the major items chosen among the conventional full specifications w量th a deployment of LSI quality functions to the wafer specification items2)，These efforts contribute to reducing