Deep Sub-Micron Self-Aligned Bottom-Gate Amorphous InGaZnO Thin-Film Transistors With Low-Resistance Source/Drain

A deep sub-micron self-aligned bottom-gate (SABG) amorphous InGaZnO (a-IGZO) thin-film transistor (TFT) technology was developed. The implementation of a backside exposure technique enables the realization of a self-aligned structure, while an argon (Ar) plasma treatment minimizes the source/drain resistance ( ${R} _{\text {SD}}$ ). High-performance metrics were well maintained on the fabricated SABG a-IGZO TFT with a channel length of 302 nm (effective channel length of 208 nm), including a low off-state current around 10−14 A/ $\mu \text{m}$ , a subthreshold swing of 103.8 mV/dec, a decent mobility of 7.48 cm2/ $\text {V}\cdot \text {s}$ , a minor drain-induced barrier lowering (DIBL) of 41.5 mV/V, a negligible channel length shrinking ( $\sf \Delta {L}$ ) of 47 nm and a record-low ${R} _{\text {SD}}$ of $0.86~\sf \Omega \cdot \text {cm}$ among self-aligned (SA) transistors. Such remarkable scalability and manufacturing capability pave a new cost-effective way for high integration-density oxide electronics.