平版印刷术
薄脆饼
曲线坐标
炸薯条
材料科学
变量(数学)
电子束光刻
反向
光电子学
光学
纳米技术
物理
工程类
电气工程
抵抗
数学
图层(电子)
几何学
数学分析
量子力学
作者
Liang Pang,Sha Lu,E. Vidal Russell,Yang Lu,Michael Lee,Jennefir L. Digaum,Manman Yang,P. Jeffrey Ungar,Michael Pomerantsev,Mariusz Niewczas,Kechang Wang,Bo Su,Michael Meyer,Aki Fujimura
出处
期刊:Journal of micro/nanopatterning, materials, and metrology
[SPIE - International Society for Optical Engineering]
日期:2024-02-06
卷期号:23 (01)
标识
DOI:10.1117/1.jmm.23.1.011207
摘要
Full-chip curvilinear inverse lithography technology (ILT) requires mask writers to write full reticle curvilinear mask patterns in a reasonable write time. We jointly study and present the benefits of a full-chip, curvilinear, stitchless ILT with mask-wafer co-optimization (MWCO) for variable-shaped beam (VSB) mask writers and validate its benefits on mask and wafer at Micron Technology. The full-chip ILT technology employed, first demonstrated in a paper presented at the 2019 SPIE Photomask Technology Conference, produces curvilinear ILT mask patterns without stitching errors, and with process windows enlarged by over 100% compared to the OPC process of record, while the mask was written by multibeam mask writer. At the 2020 SPIE Advanced Lithography Conference, a method was introduced in which MWCO is performed during ILT optimization. This approach enables curvilinear ILT for 193i masks to be written on VSB mask writers within a practical, 12-h time frame, while also producing the largest process windows. We first review MWCO technology, then curvilinear ILT mask patterns written by VSB mask writer, and then show the corresponding 193i process wafer prints. Evaluations of mask write times and mask quality in terms of critical dimension uniformity and process windows are also presented.
科研通智能强力驱动
Strongly Powered by AbleSci AI