限制器
单片微波集成电路
噪声系数
低噪声放大器
电气工程
放大器
噪音(视频)
有效输入噪声温度
噪声温度
高电子迁移率晶体管
晶体管
材料科学
电压
电子工程
工程类
计算机科学
相位噪声
CMOS芯片
图像(数学)
人工智能
出处
期刊:Journal of physics
[IOP Publishing]
日期:2019-02-01
卷期号:1168: 022040-022040
被引量:2
标识
DOI:10.1088/1742-6596/1168/2/022040
摘要
A Ka band GaAs MMIC limiter low noise amplifier is presented. According to high power limiting and low noise requirements, PIN diodes and low noise PHEMT transistors are integrated in the same GaAs substrate. Finally, a high-power PIN limiter low noise amplifier integrated chip is obtained. The limiter has two-stage anti-parallel structure. The insertion loss is lower than 1.3dB, while the input and output standing wave ratio is lower than 1.5. The LNA has self-bias and parallel negative feedback structure. Simulation results indicate that the LNA has average gain 22dB, noise figure less than 2.2dB, input voltage standing wave ration less than 1.2, output voltage standing wave ration less than 2 from 33GHz to 37GHz. The integrated limiter and LNA has average gain 22dB, noise figure less than 3.5dB, input/output voltage standing wave ration less than 2 from 33GHz to 37GHz.
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