薄膜晶体管
材料科学
光电子学
晶体管
电子迁移率
阈值电压
氧化物薄膜晶体管
纳米技术
图层(电子)
电气工程
电压
工程类
作者
Yu‐Shien Shiah,Kihyung Sim,Yuhao Shi,Katsumi Abe,Shigenori Ueda,Masato Sasase,Junghwan Kim,Hideo Hosono
标识
DOI:10.1038/s41928-021-00671-0
摘要
Thin-film transistors based on amorphous oxide semiconductors could be used to create low-cost backplane technology for large flat-panel displays. However, a trade-off between mobility and stability has limited the ability of such devices to replace current polycrystalline silicon technologies. Here we show that the sensitivity of amorphous oxide semiconductors to externally introduced impurities and defects is determined by the location of the conduction-band minimum and the relevant doping ability. Using bilayer-structured thin-film transistors, we identify the exact charge-trapping position under bias stress, which shows that the Fermi-level shift in the active layer can occur via electron donation from carbon-monoxide-related impurities. This mechanism is highly dependent on the location of the conduction-band minimum and explains why carbon-monoxide-related impurities greatly affect the stability of high-mobility indium tin zinc oxide transistors but not that of low-mobility indium gallium zinc oxide transistors. Based on these insights, we develop indium tin zinc oxide transistors with mobilities of 70 cm2 (V s)–1 and low threshold voltage shifts of –0.02 V and 0.12 V under negative- and positive-bias temperature stress, respectively.
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