Modeling and Suppression of Circulating Currents Among Parallel Single-Phase Three-Level Grid-Tied Inverters

T-type three-level inverters have attracted extensive attention for their utility in many applications, especially photovoltaic power generation. For these inverters, parallel operation offers superior performance in capacity, reliability, and scalability. However, the introduced circulating current (CC) may cause overcurrent in line, which seriously threatens the safety and stability of the system. The mechanism of CC lacks detailed analysis in single-phase modular inverters. Thus, an accurate mathematical model is established and a CC suppression method is proposed in this article for parallel-operated single-phase T-type three-level inverters. First, the characteristics of port degradation are analyzed, and an improved equivalent circuit is introduced based on the findings. Then, according to the improved equivalent circuit, a detailed mathematical model is established. Using this model, excitation sources of CC are analyzed and divided into three parts. After that, a CC suppression method involving carrier-based pulsewidth modulation with offset voltage injection is proposed, and a deadbeat controller is designed to calculate the offset voltage. Moreover, the proposed method can balance the neutral-point voltage across dc-link capacitors as well. Simulation and experimental results validate the theoretical analysis and effectiveness of the proposed scheme.