Study of Small Polyimide Open Size in Contact Resistance and Reliability For Flip Chip Cu Pillar Package

材料科学 菊花链 倒装芯片 聚酰亚胺 复合材料 接触电阻 固化(化学) 电气工程 胶粘剂 图层(电子) 工程类
作者
Kuei Hsiao Kuo Frank,Shaun Xiao,Abram Hwang,Kui Chang,Jovi Chang,Feng Tso Chien
标识
DOI:10.1109/ectc51906.2022.00272
摘要

In this investigation, the effects of small polyimide open (PIO) size for bump electrical, mechanical and package reliability performances are discussed. The contact resistance (Rc) between under bump metal (UBM) and Aluminum pad (Al) is assessed with varied PIO size; 10μm, 15μm, 20μm, 30μm and 35μm. The Rc test vehicle with I/O connected by Al metal for 4- wire Kelvin measurement is designed for Rc data collection. The UBM size is fixed for different PIO size, copper post shear strength and failure modes for different ratio of PIO area to UBM area (2%~25%) are also analyzed. Two different re-passivation materials, one is high temperature cured PI (curing temperature>350C) which is the mainstream for Cu pillar bump; the other is low temperature cured stiffer (high modulus) PI (curing temperature<300 C) that is typically used for advanced fab node are selected for comparison.The effects of small PIO size in subsequent assembly and reliability are also studied. The package size of test vehicle is 196 mm 2 with a daisy-chain die size of 11 x 11 mm 2 . The minimum bump pitch is 140μm. The UBM is fixed at 35x65μm for different PIO size; 10μm, 10x20μm, 20μm and 15x25μm to simulate typical bump design request. All the study legs of different PIO size were released to assembly and had been evaluated by employing package level thermal cycling test. The assembly and reliability performance were investigated by C-mode Scanning Acoustic Microscope (CSAM), Scanning Electron Microscope (SEM) and cross-section for each PIO leg.The study of this investigation is to know the effects of small PIO size to bump electrical, mechanical and chip package interaction to achieving robust Cu pillar interconnection in flip chip package.
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